1. Field of the Invention
The present invention relates to a charge/discharge control circuit for detecting voltage or abnormality in a secondary battery, and a battery assembly, and particularly to an overcurrent protecting circuit therefore.
2. Description of the Related Art
FIG. 9 shows a block diagram of a battery assembly including a conventional charge/discharge control circuit. The battery assembly including the conventional charge/discharge control circuit is composed of a secondary battery 101, N-ch FETs 901 and 902, a constant current circuit 903, a comparator 904, an overdischarge detecting circuit 905, an overcharge detecting circuit 906, a discharge control circuit 907, a charge control circuit 908, a discharge control FET 910, a charge control FET 911, and external terminals 155 and 156 between which a load 909 is connected. The N-ch FETs 901 and 902, the constant current circuit 903, and the comparator 904 make up a discharge overcurrent protecting circuit.
The following will describe the operation of the discharge overcurrent protecting circuit in the conventional battery assembly. It is assumed that the overcurrent detection current is denoted as Ioc, on-resistances of the N-ch FETs 901 and 902 are denoted as Ron 901 and Ron 902, and on-resistances of the discharge control FET 910 and the charge control FET 911 are denoted as Ron 910 and Ron 911. In this case, constant current Iref produced from the constant current circuit 903 is set as follows:Iref=Ioc×(Ron 911+Ron 910)÷(Ron 902+Ron 901),where, if the N-ch FETs 901 and 902 have the same temperature characteristics and source-gate voltage characteristics as the discharge control FET 910 and the charge control FET 911,(Ron 902+Ron 901)÷(Ron 911+Ron 910)=K (constant).
Then, if constant reference current Iref is supplied from the constant current circuit 903, the overcurrent detection current Ioc can also be set to a constant magnitude.
As mentioned above, if these N-ch FETs 901 and 902, the discharge control FET 910, and the charge control FET 911 are arranged in the same semiconductor integrated circuit to equalize parameters other than those (gate width/gate length) of the charge control FET 911 and the N-ch FET 902, and the discharge control FET 910 and the N-ch FET 901, the above-mentioned conditions can be fulfilled.
Since the constant K is set to one or more (K≧1) in consideration of the consumption current in and size of the overcurrent protecting circuit, the magnitude of reference current Iref is made smaller to make the sizes of the N-ch FETs 901 and 902 smaller than those of the charge control FET 911 and the discharge control FET 910, respectively. Thus, the reference current Iref becomes Iref=Ioc÷K.
The charge control FET 911 and the discharge control FET 910 have large widths to allow a large current to flow. Therefore, if the gate widths of the N-ch FETs 901 and 902 are set to one millionth of the gate widths of the charge control FET 911 and the discharge control FET 910, respectively, a million-fold increase in on-resistance can be achieved. The sizes of the N-ch FETs 901 and 902 can also be made sufficiently smaller than those of the charge control FET 911 and the discharge control FET 910.
Thus, on-resistances Ron 911, Ron 910, and Ron 902, Ron 901 equivalent to one another in terms of the temperature characteristics and the gate drive voltage characteristics are used in the charge control FET 911, the discharge control FET 910, and the N-ch FETs 901 and 902, respectively, so that characteristic variations due to changes in temperature and battery voltage can be compensated for without fault. Then, an overcurrent state can be detected accurately by the overcurrent detecting comparator 904 (for example, see Patent Document 1).
[Patent Document 1] Japanese Patent Application Publication No. 2009-131020